Early Exploration of MIPS Cost and Memory Cost Trade-off for MediaDSP Media Processor
نویسندگان
چکیده
This paper presents an attempt at an early investigation or exploration of the trade-off between MIPS cost and memory cost. The cost model is an approximation based on knowledge of the application behavior and algorithm inner loop costs for the hardware architecture, which consists of a control processor and a SIMD processor. The application is an H.264 video decoder. Various memory configurations such as double buffer and other trade-offs between MIPS cost and memory size are compared.
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